The present invention relates to memory systems in computer systems. More specifically, the present invention relates to a method and apparatus for implementing multiple memory buses on a memory module.
Memory modules such as the Dual In-Line Memory Module (DIMM) have become a popular memory packaging design. DIMMs are small printed circuit boards mounted with a plurality of memory devices. The more widely used DIMMs have 168 pins and can transfer 64 bits at a time. DIMMs have leads accessible via both sides of a printed circuit board""s electrical connector unlike its predecessor, the Single In-Line Memory Module (SIMM), which has leads on only one side of the printed circuit board""s electrical connector. DIMMs are inserted into small socket connectors that are soldered onto a larger printed circuit board, or motherboard. Because DIMMs are socketed, they are inherently replaceable and upgradable. The DIMMs are typically connected in parallel to a memory controller via a single memory bus. The memory controller coordinates movement of data between memory devices on the DIMMs and the other components on the computer system via the single memory bus.
One drawback to memory systems implementing memory modules was that the memory systems were limited to the number of memory devices that may be connected to the memory bus. Thus, regardless of the number of memory devices that were mountable on a memory module and the number of socket connectors that were mountable on a motherboard, the capacity of the memory system was limited by the constraint imposed by the memory bus.
A memory repeater has a first I/O port and a second I/O port. The memory repeater first I/O port is coupled to a first memory bus. The memory repeater second I/O port is coupled is series to a second memory bus.